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超级链接 -- 存储器
存储器单元设计：
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2 R! |8 A+ d' [1. http://www.rulabinsky.com/cavd/text/chap11-6.html
, l$ Z4 F! o& E. @8 u3 J2. One KByte SRAM chip Specifications and Design Plan# {5 w6 [4 Q" v1 D
http://www.cedcc.psu.edu/khanjan/vlsispec.htm3 Q, C- ~4 D3 T3 j' q
3. Implementation of SRAM bitcell with a Low-Voltage Sense Amplifier 0 l5 t9 G" d! j2 _# U- r R
http://www-unix.ecs.umass.edu/~rramanar/Lab4.htm
- J- u) D7 m. D+ M- J4. Review of 6T SRAM Cell 1 s5 u7 G& }0 B2 \
http://larc.ee.nthu.edu.tw/~dtc/doc/940603.pdf
& m8 `* @ \( Q8 U5 g5 X5. The World of Memories l4 e' C1 e5 @" c$ n
https://intranet.insa-toulouse.fr/view/422/content/memory_world.html
With your idea, Carry out together.
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