FIFO Design for High-speed network interface Two FIFO Ring Performance Experiments A Low-Latency FIFO for Mixed-clock systems A 6.4 Gbps FIFO Design for 8-32 Two-way data exchange bus A FIFO Memory for Signal Processing Applications A Synthesizable RTL Design of Asynchronous FIFO

谢谢！ 不知道有什么地方能找到更多关于FIFO的资料呢？

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滴滴答答地弹ddddd

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