1. The Verilog Hardware Description Language, 5th Edition
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http://www.eetop.com.cn/cgi-bin/ ... ic=3208&show=258 t6 d% X' g( ^4 R' x, q
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2. Prentice.Verilog.HDL.A.Guide.To.Digital.Design.And.Synthesis.2nd.Edition
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3. IEEE standard Verilog HDL
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Verilog ref: http://www.sutherland-hdl.com/on ... /vlog_ref_body.html" k5 w" G! w* [. s6 ?7 ?* K( E
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NCVlog tool
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6.
File I/O in verilog: http://www.chris.spear.net/pli/fileio.htm
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Guide: http://mufasa.informatik.uni-man ... is_with_verilog.pdf7 ?3 i" C, x* M. n3 {# O; k1 a
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Verilog 10 golden rules: http://www.bawankule.com/verilogcenter/files/10_1.pdf w( |! x" }4 r, B h
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State Encoding: http://www.sunburst-design.com/papers/CummingsSNUG1998SJ_FSM.pdf+ D) ?% m4 ?5 V, C9 h) K/ m
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; J, s2 X% w2 U8 @, V0 qManuals/FAQ/References2 o9 K) x, w- ?* Z2 n
- Gerard Blair’s Verilog Manual, o3 B1 h3 |; o# l1 F! I
- Cadence Design Systems, Verilog-XL Reference Manual (PDF version)
$ z! J5 C1 v2 }% V9 a3 Z- Verilog Manual By Dr. Daniel C. Hyde from Bucknell University (PDF version); k- V' g6 e& }. r
- Verilog Quick Reference at Carleton University-PDF0 g0 @/ ^* [# x4 f" `, }# G6 @
- Verilog Quick Reference by Stuart Sutherland -Author of Verilog PLI Handbook# v3 x4 j1 \2 @
- Verilog Quick Reference by Andy S. Tsay and Carolin Lin
3 U/ H6 H5 k( `+ q3 `2 F' t- Verilog Educational Presentation by Donald Thomas-PDF -Author of The Verilog Hardware Description Language8 j3 ~5 T4 Q7 {/ H/ A/ ~
- Verilog Reference by Xilinx-PDF
4 r: B! X! y. F$ P0 y- Aldec Verilog/VHDL Interactive Tutorials (Windows Executable)
0 q0 o% g- I. f: t& C- Mabex Verilog/VHDL Interactive Tutorial Demos (Windows Executable)* \- H4 \' s0 }5 S0 s4 |
- Rajesh Bawankule’s Verilog Center (Check out the FAQs): t3 X: D' f; B7 L
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- Comp.Lang.Verilog FAQ
% Z6 P0 e# P/ O4 ~4 _# {- Verilog (Chapter 11 and Appendix B) from Michael John Sebastian Smith’s online ASIC Book% r ~4 w k! D
- Verilog Instant Reference-PDF
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: J/ w/ p8 ^: t& G" }Good Verilog Papers/Presentations( R- m/ U' {# Q. z- X* o+ B
- Papers by Stuart Sutherland
' v% d" }# D* F& L" U. Q! l# s- Papers by Clifford Cummins! F7 x: b; v# d2 f3 @5 R
University Links and Research
1 P1 Z( x! L; @/ T8 h1 ^# o- Mike Gordon’s Verilog site (Read the paper The Semantic Challenge of Verilog HDL here)
2 ~: \' f E5 l5 ?9 M" v- Gerard Blair’s Verilog and VLSI Links: b, }" u) o( W6 G
' o8 x$ X. J# @* a$ v( q" B( Y8 NDedicated Verilog Sites
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- Verilog.com; n- r: f8 E* L( d% {4 b. g& }
6 B8 V0 |% B* ?- S# ?Art of Verification. u. I. k" ^7 H7 F/ c
- Project VeriPage by Swapnajit Mitra (PLI Tutorial/Links/FAQ) -Author of Principles of Verilog PLI - Chris Spear’s Verilog/PLI site
# ]! N4 d9 |3 E0 w. K0 T- Janick Bergeron’s Verification site -Moderator of Verification Guild & Author of Writing Testbenches-Functional Verification of HDL Models
3 _3 x8 L8 f$ x3 s6 ]3 k% Z- Verification Methodology Manual-Book Online6 }- \6 \, N9 O# V; c D
Scripts/Tools) b. T$ p/ }- v1 v9 {. u& L$ e
- Verilog to HTML converter for code browsing and web posting% t5 e- w y6 E$ ^5 s- H6 n1 `
Other Users Verilog Links) @4 l0 {4 U' d, P% l
- John Cooly's DeepChip website ], s0 W2 K! _! C
- http://www.ece.ucdavis.edu/~jwwebb/
) R; p1 |9 z3 r$ j7 \" J$ z) v1 Q- http://bunniestudios.com/bunnie/links.html
& X, d2 z% T1 {2 J3 j8 ~- http://www.csd.uoc.gr/~simos/bookmarks.html
; @) F/ A, k! b' b; n& M- v- http://www4.ncsu.edu/~vkreddy/links.htm2 q$ d! s7 O. c; z, T/ m" W* y# F1 I
- http://www.inf.pucrs.br/~calazans/NCbookmarks.html
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